#3: Basic Logic Gates
- Read Chapter 3 of William Kleitz's Digital Electronics:
A Practical Approach with VHDL (9th edition).
- Turn in solutions to Problems 3–1,
3–4, 3–5, 3–6, 3–7*, 3–8*, 3–12*,
3–14, 3–16, 3–17, 3–18, 3–26, 3–27*,
3–29, 3–31, 3-32*, 3–44, 3–48**, 3–49, 3–50**,
and 3–51, on pages 97 to 108.
- *These problems ask you to draw a timing diagram. Use
a straight-edge to draw straight vertical or horizontal
lines; don't draw your lines free-hand. If you don't
want to redraw all of the input waveforms by hand, print these pages and
draw the output waveforms only.
- **In Problems 3–48 and 3–50, when it says that
a pin is flashing, that means that the logic level on that pin
is changing back and forth between HIGH and LOW, instead of a
constant HIGH or a constant LOW. Don't confuse flashing with floating:
they're very different.
- For the odd-numbered problems, check yourself against
the answers given in Apppendix D (starting on page 893).